1. Field of the Invention
The present invention relates to a method and related apparatus for performing error checking and correcting, and more particularly, to a method and related apparatus for determining whether an error checking-correcting function is performed on data based on an address of the data.
2. Description of the Prior Art
Computer systems are indispensable to the information society. With a computer system, it is convenient for users to calculate, access, and manage a large amount of information, data, and video at high speed. Therefore, information technology manufacturers have been devoted to improving the performance of computer systems to access data more precisely.
Generally, a computer system comprises a central processing unit (CPU) for controlling the operation of the computer system, a memory for storing data, and a control chip (such as a north bridge circuit or chipset) for managing data transmission between the CPU and the memory. Many error detection schemes have been used in computer systems to ensure that the CPU (and other circuits in the computer system) can access data from the memory precisely. Take an error checking-detecting (ECC) function for example. The ECC function can detect errors and correct errors simultaneously. A control chip can implement the ECC function.
When performing the ECC function, if a write command indicates to store data into the memory, the control chip processes data and generates a verifying ECC code accordingly. The data and the ECC code will be stored in the memory at the same time. Generally, a conventional algorithm of the ECC function generates an 8-bit verifying ECC code according to 64-bit data. When the data is read from the memory, the control chip reads the data and corresponding verifying ECC code simultaneously, and generates syndrome bits based on the data and the verifying ECC code for determining whether the read data is correct. The syndrome bits can indicate which bit of the data is incorrect, and the wrong bit will be corrected. If two bits are incorrect, the control chip reports an error message instead of correcting errors.
Since the conventional algorithm of the ECC function is for 64-bit data/8-bit verifying ECC code, a partial-write function might be performed on data, the partial-write function including read/modify/write commands. For instance, suppose that an 8 bits of data is being written into the memory. The ECC function is performed on 64 bits of data taken as integrated data for generating an 8-bit verifying ECC code. Therefore, a corresponding 56 bits of data (and verifying ECC code) must be read from the memory for integrating the 64 bits of data needed by the ECC function. Then data can be written in the memory.
In the prior art, when accessing data in the memory, the ECC function must be performed to ensure data precision. Thus, the computer system must consume more system resources for providing the ECC function, especially for the partial-write function. Therefore, the performance of the computer system is reduced. If the ECC function is not executed, the performance of the computer system is higher, but the accessed data might be incorrect. In other words, prior art computer systems do not have a good balance between performance and data precision.